define("ace/mode/verilog_highlight_rules",["require","exports","module","ace/lib/oop","ace/mode/text_highlight_rules"], function(require, exports, module) {
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"use strict";
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var oop = require("../lib/oop");
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var TextHighlightRules = require("./text_highlight_rules").TextHighlightRules;
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var VerilogHighlightRules = function() {
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var keywords = "always|and|assign|automatic|begin|buf|bufif0|bufif1|case|casex|casez|cell|cmos|config|" +
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"deassign|default|defparam|design|disable|edge|else|end|endcase|endconfig|endfunction|endgenerate|endmodule|" +
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"endprimitive|endspecify|endtable|endtask|event|for|force|forever|fork|function|generate|genvar|highz0|" +
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"highz1|if|ifnone|incdir|include|initial|inout|input|instance|integer|join|large|liblist|library|localparam|" +
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"macromodule|medium|module|nand|negedge|nmos|nor|noshowcancelled|not|notif0|notif1|or|output|parameter|pmos|" +
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"posedge|primitive|pull0|pull1|pulldown|pullup|pulsestyle_onevent|pulsestyle_ondetect|rcmos|real|realtime|" +
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"reg|release|repeat|rnmos|rpmos|rtran|rtranif0|rtranif1|scalared|showcancelled|signed|small|specify|specparam|" +
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"strong0|strong1|supply0|supply1|table|task|time|tran|tranif0|tranif1|tri|tri0|tri1|triand|trior|trireg|" +
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"unsigned|use|vectored|wait|wand|weak0|weak1|while|wire|wor|xnor|xor" +
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"begin|bufif0|bufif1|case|casex|casez|config|else|end|endcase|endconfig|endfunction|" +
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"endgenerate|endmodule|endprimitive|endspecify|endtable|endtask|for|forever|function|generate|if|ifnone|" +
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"macromodule|module|primitive|repeat|specify|table|task|while";
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var builtinConstants = (
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"true|false|null"
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);
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var builtinFunctions = (
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"count|min|max|avg|sum|rank|now|coalesce|main"
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);
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var keywordMapper = this.createKeywordMapper({
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"support.function": builtinFunctions,
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"keyword": keywords,
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"constant.language": builtinConstants
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}, "identifier", true);
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this.$rules = {
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"start" : [ {
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token : "comment",
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regex : "//.*$"
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}, {
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token : "comment.start",
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regex : "/\\*",
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next : [
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{ token : "comment.end", regex : "\\*/", next: "start" },
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{ defaultToken : "comment" }
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]
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}, {
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token : "string.start",
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regex : '"',
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next : [
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{ token : "constant.language.escape", regex : /\\(?:[ntvfa\\"]|[0-7]{1,3}|\x[a-fA-F\d]{1,2}|)/, consumeLineEnd : true },
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{ token : "string.end", regex : '"|$', next: "start" },
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{ defaultToken : "string" }
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]
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}, {
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token : "string",
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regex : "'^[']'"
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}, {
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token : "constant.numeric", // float
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regex : "[+-]?\\d+(?:(?:\\.\\d*)?(?:[eE][+-]?\\d+)?)?\\b"
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}, {
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token : keywordMapper,
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regex : "[a-zA-Z_$][a-zA-Z0-9_$]*\\b"
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}, {
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token : "keyword.operator",
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regex : "\\+|\\-|\\/|\\/\\/|%|<@>|@>|<@|&|\\^|~|<|>|<=|=>|==|!=|<>|="
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}, {
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token : "paren.lparen",
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regex : "[\\(]"
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}, {
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token : "paren.rparen",
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regex : "[\\)]"
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}, {
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token : "text",
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regex : "\\s+"
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} ]
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};
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this.normalizeRules();
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};
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oop.inherits(VerilogHighlightRules, TextHighlightRules);
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exports.VerilogHighlightRules = VerilogHighlightRules;
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});
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define("ace/mode/verilog",["require","exports","module","ace/lib/oop","ace/mode/text","ace/mode/verilog_highlight_rules","ace/range"], function(require, exports, module) {
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"use strict";
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var oop = require("../lib/oop");
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var TextMode = require("./text").Mode;
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var VerilogHighlightRules = require("./verilog_highlight_rules").VerilogHighlightRules;
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var Range = require("../range").Range;
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var Mode = function() {
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this.HighlightRules = VerilogHighlightRules;
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this.$behaviour = this.$defaultBehaviour;
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};
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oop.inherits(Mode, TextMode);
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(function() {
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this.lineCommentStart = "//";
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this.blockComment = {start: "/*", end: "*/"};
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this.$quotes = { '"': '"' };
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this.$id = "ace/mode/verilog";
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}).call(Mode.prototype);
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exports.Mode = Mode;
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});
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(function() {
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window.require(["ace/mode/verilog"], function(m) {
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if (typeof module == "object" && typeof exports == "object" && module) {
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module.exports = m;
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}
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});
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})();
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